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Technical Manager - Verification Lead
The vacancy has expired
- LocationChennai,Bengaluru / Bangalore,Hyderabad
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IndustryElectrical/Electronic Manufacturing
Job Description
KEY RESPONSIBILITIES
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Lead and mentor a team of verification engineers, providing guidance and support throughout the verification lifecycle.
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Develop and implement comprehensive verification strategies for InCore designs, including test plans, coverage analysis, and regression management.
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Drive the adoption of advanced verification methodologies and best practices to improve efficiency and quality.
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Collaborate with cross-functional teams to define verification requirements, review specifications, and resolve design issues.
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Design and implement reusable verification components, test benches, and automation scripts to streamline verification processes.
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Conduct thorough functional and performance verification of InCore designs, ensuring compliance with specifications and industry standards.
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Manage verification schedules, resource allocation, and project priorities to meet development milestones and deliverables.
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Stay updated on emerging technologies, tools, and methodologies in semiconductor design and verification, and integrate them into our workflows as appropriate.
Requirements
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Bachelor's/Master's degree in electrical engineering, Computer Engineering, or related field.
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At least 5 years of experience in ASIC/FPGA verification
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Deep understanding of verification methodologies, such as UVM, and proficiency in System Verilog.
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Experience with industry-standard EDA tools for simulation, debug, and coverage analysis (e.g., Cadence, Synopsys, Mentor).
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Strong problem-solving skills and attention to detail, with the ability to analyze complex designs and identify verification gaps.
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Excellent communication and interpersonal skills, with the ability to collaborate effectively across teams and disciplines.
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Leadership experience, including the ability to mentor junior engineers, drive consensus, and lead projects to successful completion.
BONUS SKILLS
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Experience with core verification and micro-architecture verification.
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Knowledge of RISC-V architecture and verification methodologies.
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Familiarity with scripting languages (e.g., Python, Perl) and automation frameworks for verification.
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Proficiency in GNU Toolchain (GCC, Binutils, GDB etc).